| Tag | Ind | Content |
|---|
| 001 | ## | 0005-6021 |
| 016 | ## | M0087088 c1 |
| 016 | ## | M0093882 c2 |
| 020 | ## | 053446629x |
| 035 | ## | Main000056021 |
| 082 | ## | 621.395\bU97C 2006 |
| 100 | ## | Uyemura, John P |
| 245 | ## | Chip design for submicron VLSI : CMOS layout and simulation /\cJohn P. Uyemura |
| 260 | ## | Australia :\bThomson,\c2006 |
| 300 | ## | xvi, 411 p : \bill |
| 500 | ## | 1 CD |
| 650 | ## | Integrated circuits \xVery large scale integration |
| 650 | ## | Low voltage integrated circuits |
| 650 | ## | Metal oxide semiconductors, Complementary |
| 690 | ## | Faculty of Engineering \xComputer Engineering |
| 690 | ## | Faculty of Engineering \xElectronic Engineering |
| 856 | ## |  \nตัวอย่างหน้าปก\u%$URLBASE00%/multim/picture/B716.jpg |
| 910 | ## | 1,260 |
| 930 | ## | General |
| 949 | ## | Central Library - 2nd floor |
ไทย
\nตัวอย่างหน้าปก\u%$URLBASE00%/multim/picture/B716.jpg
